A High-Efficient Image Scalar Algorithm for LCD Signal Processor

نویسنده

  • Tze-Yun Sung
چکیده

In this paper, the image scalar algorithm and architecture for LCD monitor and television controller is presented. The program of hardware code is described to explain the proposed algorithm and architecture. The proposed image scalar has been applied on LCD monitor and TV controller or signal processor. The scalar has been evaluated and applied on the LCD display controller successfully.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

A High-Efficient and Cost-Effective LCD Signal Processor

This paper investigates the system of LCD monitor and TV signal processor. It is shown that the processor provides scalar, brightness and contrast adjuster, Gamma correction and dithering. The algorithms are discussed and implemented by Verilog hardware description language. The key hard codes are displayed. The signal processor for monitor and TV achieves real-time and high performance. The sy...

متن کامل

DPML-Risk: An Efficient Algorithm for Image Registration

Targets and objects registration and tracking in a sequence of images play an important role in various areas. One of the methods in image registration is feature-based algorithm which is accomplished in two steps. The first step includes finding features of sensed and reference images. In this step, a scale space is used to reduce the sensitivity of detected features to the scale changes. Afterw...

متن کامل

Signal Identification Using a New High Efficient Technique

Automatic signal type identification (ASTI) is an important topic for both the civilian and military domains. Most of the proposed identifiers can only recognize a few types of digital signal and usually need high levels of SNRs. This paper presents a new high efficient technique that includes a variety of digital signal types. In this technique, a combination of higher order moments and hi...

متن کامل

Low Settling Time All Digital DLL For VHF Application

Settling time is one of the most important parameter in design of DLLs. In this paper we propose a new high speed with low settling time Delay Locked Loop (DLL) in which a digital signal processor (DSP) is used instead of using phase-frequency detector, charge pump and loop filter in conventional DLL. To have better settling time, PRP conjugate gradient algorithm is used to optimize delay of ea...

متن کامل

ISSCC 2011 / SESSION 7 / MULTIMEDIA & MOBILE / 7 . 3 7 . 3 A 275 mW Heterogeneous Multimedia Processor for IC - Stacking on Si - Interposer

Most data-intensive operations for multimedia applications such as image processing, vision, and 3D graphics require high external memory bandwidth. In augmented-reality (AR) processors [1], both 3D graphics and vision operations are required, so memory bandwidth becomes even more critical. In [1], however, memory bandwidth is not considered, floating-point processing is not supported, and ther...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2006